The present disclosure generally relates to aggregation techniques and more particularly to multi-level aggregation techniques that use memory hierarchies.
In computer architecture, memory refers to the physical devices that are used to store data generated or processed by programs or other sequences of instructions. Storage of data, and even storage of programs and instructions themselves, can be made on a temporary or permanent basis for immediate or future processing use.
The length of time required for data storage as well as expected performance level are key in electing appropriate memory devices. This is due to the fact that memory devices can be expensive and their capacity can be limited. The term permanent or primary memory is often used in association with addressable semiconductor memory such as random access devices such as (RAM) or static random access memory (SRAM) or dynamic random access memory (DRAM). Primary memory is used often for fast but temporary storage. However, other type of memory such as hard disk drives, solid-state drives (SSD), and optical disc drives provide additional and auxiliary memory storage capabilities.
Auxiliary memory storage devices can provide a less expensive solution than primary memory devices but less cost also comes traditionally with lower performance and speed. Nonetheless, slower memory devices often provide larger memory capacity. In contrast, more expensive memory devices offer less memory capacity but provide improved speed and performance. For example, a cache memory device provides faster processing time but temporal storage solutions. In addition, storage capacity of a cache is limited and therefore cache storage is used in instances where data will be displaced shortly in the future. In addition, data in cache does not always necessarily correspond to data that is located in a more permanent memory. This is because data components are often brought into cache and taken out of it one cache line at a time.
Consequently, in design of computing environments, the design architects have to elect between the many tradeoffs of providing a high performance device as opposed to cheaper memory with higher capacity and slower runtime.